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Design and Test Strategies for 2d/3D Integration for Noc-Based Multicore Architectures
Kanchan Manna, Jimson Mathew
Livre broché | Anglais
52,95 €
+ 105 points
Format
Description
This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems. It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors describe the use of the Integer Line Programming (ILP) technique for smaller benchmarks and a Particle Swarm Optimization (PSO) to get a near optimal mapping and test schedule for bigger benchmarks. The PSO-based approach is also augmented with several innovative techniques to get the best possible solution. The tradeoff between performance (communication or test time) of the system and thermal-safety is also discussed, based on designer specifications.
- Provides a single-source reference to design and test for circuit and system-level approaches to (NoC) based multicore systems;
- Gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling in (NoC) based multicore systems;
- Organizes chapters systematically and hierarchically, rather than in an ad hoc manner, covering aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.
Spécifications
Parties prenantes
- Auteur(s) :
- Editeur:
Contenu
- Nombre de pages :
- 162
- Langue:
- Anglais
Caractéristiques
- EAN:
- 9783030313128
- Date de parution :
- 10-01-21
- Format:
- Livre broché
- Format numérique:
- Trade paperback (VS)
- Dimensions :
- 156 mm x 234 mm
- Poids :
- 254 g
